Stable blocking oscillator for generation of asymmetric bidirectional current pulses



Dec. 7, 1965 K. A. HARRIGER STABLE BLOCKING OSCILLATOR FOR GENERATION OFASYMMETRIC BIDIREGTIONAL CURRENT PULSES Filed Sept. 12, 1962 2Sheets-Sheet 1 INVENTOR.

KEITH A. HARRICIER Mum AHoIneY' Dec. 7, 1965 K. A. HARRIGER 3,222,515

STABLE BLOCKING OSCILLATOR FOR GENERATION OF ASYMMETRIC BIDIRECTIONALCURRENT PULSES 2 Sheets-Sheet 2 Filed Sept. 12, 1962 "'l l l l l l l I ll l I INVENTOR. KEITH A. HARRIGER ATTORNEY .an asymmetric alternatingcurrent pulse or wave.

United States Patent F STABLE BLOCKENG USCILLATQR FQR GENERA- Thepresent invention relates to novel and improved apparatus for thegeneration of alternating curent signals.

More particularly, it relates to novel and improved apparatus forgenerating an asymmetric alternating current pulse in which theparameters of width, amplitude and frequency are easily controlled.

In various electrical and electronic applications, it often becomesnecessary and desirable to generate and use Thus, for example, in theexcitation of a multiaperture magnetic core generally known as atransfluxor, a large amplitude .pulse of one polarity and a relativelysmall amplitude pulse of opposite polarity is generally necessary toprovide proper operation at high efficiency, Although various methodsand apparatus have been provided in the past to generate asymmetricwaves, considerable difiiculty has been experienced heretofore inproviding apparatus of this kind which is relatively simple in designand yet sufficiently reliable, efficient and dependable in use.

Itis therefore a principal object of the present invention to provide anovel and improved asymmetric wave generator in which the variousparameters of the output signal may be readily controlled.

It is a further object of the present invention to provide a novel andimproved asymmetric wave generator which operates at high efliciency andwhich can be used in the limited space often available on a transfluxoror other electrical equipment.

Other objects and many of the attendant advantages of this inventionwill be readily appreciated as the same becomes better understood byreference to the following detailed description when considered inconnection with the accompanying drawings wherein:

FIG. 1 is a diagrammatic view of a preferred embodiment of the presentinvention;

FIG. 2 shows the waveforms of current pulses at selected points in theembodiment of FIG. 1;

FIG. 3 is a diagrammatic view of another preferred embodiment of thepresent invention;

FIG. 4 is a diagrammatic view of still another preferred embodiment ofthe present invention.

One preferred embodiment of the present invention is illustrated in FIG.1 of the drawing. As shown therein, the emitter-collector circuit oftransistor Q extends from the direct current power supply line 3 throughthe transistor and through the primary winding 5,, of transformer 5 toground. The base of transistor Q is coupled to its emitter through thealternating current source S The emitter-collector circuit of transistorQ extends from the power supply line 3 through transistor Q and throughthe other primary winding 5, of transformer 5 to ground. The base oftransistor Q is coupled to its emitter through the alternating curentsource S which operates at the same frequency but 180 degrees out ofphase with source S The secondary winding 5 of transformer 5 is coupledto the load 7 in a circuit that extends from one side of winding 5through the load and through the parallel arrangement of seriesconnected diode D and variable resistor R and series connected diode Dand variable resistor R Windings 5 and 5 of transformer 5 are wound andoriented with respect to winding 5 in the manner indicated in thedrawing so as to induce potentials of op- EQZLMG Patented cc. 7, 1965posite polarity across winding 5 as current from the power supply line 3alternately energizes windings 5,, and 5 In operation, when transistor Qis cut off by the reverse bias periodically applied to its base by thealternating current source S the forward bias simultaneously applied tothe base of transistor Q energizes it and current flows from the powersupply line 3 through the transistor and through primary winding 5 oftransformer 5 to ground. Flow of current through winding 5,, induces apotential across secondary winding 5 and current flows in the secondarycircuit from winding 5 successively through diode D variable resistor Rand the load 7 back to winding 5 During the next half cycle ofalternating sources S and S transistor Q is cut off by the reverse biasapplied to its base by source S and current flows through transistor Qand winding 5,, of transformer 5 due to the forward bias applied to thebase of transistor Q by source S Flow of current through winding 5,,then induces a potential across secondary winding 5 and current in thesecondary circuit flows successively through the load 7 variableresistor R and diode D Waveforms 9 and 11 of the flow of current throughtransistors Q and Q and of the asymmetric pulse 13 applied across theload 7 are shown in FIG. 2 of the drawing. It will be noted thatalthough current flows through transistors Q and Q during substantiallythe entire interval or half cycle that they are forwardly biased,current in the secondary circuit of transformer 5 flows only during thefirst portion of each half cycle. This is caused by saturation of thecore of transformer 5. Thus, although current continues i'loW throughthe primary winding of transformer 5 throughout ea chentire half cycle,no change of flux is developed between the primary and secondarywindings and no secondary output voltage results after the core of thetransformer saturates. The difference in amplitude of the positive andnegative pulses of the output signal 13 is primarily determined by theturns of windings 5 and 5 Resistors R and R control the flow of currentin the primary and secondary windings of transformer S and thereforealso control how quickly the core of transformer 5 becomes saturated.Thus, by varying the resistance of resistors R and R the relative widthof the positive and negative output pulses of waveform 13 may be readilycontrolled.

Another embodiment of the present invention is illustrated in FIG. 3 ofthe drawing. As shown therein, the emitter-collector circuit oftransistor Q extends from the direct current power supply line 21through the transistor, through the primary winding 23,, of transformer23, and through the primary winding 25 of transformer 25 to ground. Thebase of transistor Q is coupled to its emitter through the secondarywinding 25, of transformer 25 and variable resistor R Theemitter-collector circuit of transistor Q extends from the power supplyline 21 through transistor Q through the primary winding 23,, oftransformer 23, and through the primary winding 25,, of the transformer25 to ground. The base of transistor Q; is coupled to its emitterthrough the secondary winding 25 of transformer 25 and variable resistorR The secondary winding 23, of transformer 23 is coupled to the load 27in a circuit that extends from one side of winding 23 through the loadand through the parallel arrangement of the series connected diode D andvariable resistor R and the series connected diode D and variableresistor R Windings 23,, and 23 of' transformer 23 are wound andoriented with respect to winding 23 in the manner indicated in thedrawing so as to induce potentials of opposite polarity across winding23 as current from the power supply line 21 alternately eenrgizeswindings 23,, and 23 Windings 25 and 25 of transformer 25 are wound andoriented with respect to windings 25 and 25 in the manner also indicatedin the drawing and provide potentials at the bases of transistors Q andQ; in a manner which will be more apparent hereinafter. The common coreof windings 25 25 25 and 25 of transformer 25 is designated in thedrawing by the dotted line 25 In operation, when the flow of currentthrough transistor Q is increasing, a forward bias is developed acrosstransistor Q and a reverse bias is developed across transistor Q; by wayof windings 25 and 25 of transformer 25. When the core of transformer 25saturates, the forward bias on transistor Q cuts off. When transistor Qcuts off, the flux of transformer 25 decreases from its saturation valueto its remanent value. This applies a forward bias on transistor Q andit begins to conduct. Transistor Q continues to conduct untiltransformer 25 saturates in the opposite direction. When this occurs,the forward bias across transistor Q dissipates in variable resistor Rand transistor Q cuts off. The flux through transformer 25 thendecreases from its saturation value to its remanent value inducing aforward bias across transistor Q and the entire cycle is repeated. Astransistors Q and Q alternately conduct current from the power supplyline 21 in a free-running oscillatory manner and as transformer 25operates from knee-to-knee on its flux-current loop, potentials ofalternate polarity are induced in the secondary winding 23 oftransformer 23 from windings 23 and 23 The core of transformer 23saturates before the core of transformer 25 so as to produce an outputwaveform similar to that shown in FIG. 2 for the circuitry of FIG. 1.Current in the secondary circuit of transformer 23 then alternatelyflows through load 27 in the same manner as was described above in thedescription of the embodiment of FIG. 1.

Still another embodiment of the present invention is illustrated in FIG.4 of the drawing. As shown therein, the emitter-collector circuit oftransistor Q extends from the direct current power supply line 41through the transistor, and successively through the primary windings43,,, 45,, and 4'7 of transformers 43, 45 and 47 to ground. The base oftransistor (2,; is coupled to its emitter through the secondary winding45,, of transformer 45 and variable resistor R The series connectedsecondary winding 47,, of transformer 47 and diode D are connected asshown in parallel with variable resistor R The emitter-collector circuitof transistor Q extends from the power supply line 41 through transistorQ and successively through the primary winding 43 45 and 47 oftransformers 43, 45 and 47 to ground. The base of transistor Q; iscoupled to its emitter through the secondary winding 45 of transformer45 and variable resistor R The series connected secondary winding 47 oftransformer 4'7 and diode D are connected as shown in parallel withvariable resistor R The secondary winding 43 of transformer 43 iscoupled to the load 49 in a circuit that extends from one side ofwinding 43 through the load and through the parallel arrangement of theseries connected diode D and variable resistor R and the seriesconnected diode D and variable resistor R Windings 43 and 43 oftransformer 43 are wound and oriented with respect to winding 43,, inthe manner indicated in the drawing so as to induce potentials ofopposite polarity across winding 43 as current from the power supplyline 41 alternately energizes windings 43 and 43 Windings 45 and 45 andwindings 47 and 47 of transformers t and 47 are wound and oriented withrespect to their respective primary windings 45 and 45 and windings 4V7and 47 in the manner also indicated in the drawing and affect potentialsat the bases of transistors Q and Q in a manner which will be moreapparent hereinafter. The common cores of windings 47 47 47 and 47 oftransformer 43 and of windings 45, 45 45,, and 45 of transformer 45 arerespectively designated in the drawing by the dotted lines 47 and 45 Inoperation, the embodiment of the invention shown in FIG, 4 0f thedrawing operates generally similar to that of the above describedembodiment of FIG. 3. The circuits which include diodes D and D andwindings 47 and 47 of transformer 47, however, provide particularlyrapid switching of transistors Q and Q, where high repetition rates ofthe alternating current output pulse is desired. Thus when transistor Qconducts, an output pulse is developed in transformer 43, a sustainingnegative bias for maintaining transistor Q-S conductive is developed intransformer 47, and a relatively small postive counterbias is developedin transformer 47. Although the positive potential developed acrossresistor R-7 by winding 47,, tends to cut transistor Q-S off, it isineffective as long as the larger negative biasing potential ismaintained by winding 45, The core of transformer 43 saturates first.This terminates the positive portion of pulse 13 and produces theinterval between pulses shown in FIG. 2. After a predetermined interval,the core of transformer 45 also saturates. The negative bias developedin winding 45,, therefore dissipates. The positive bias developed inwinding 47 then takes over and quickly cuts transistor Q-5 off. Asimilar cycle of events occurs when transistor Q-6 is energized and issubsequently cut-off.

Obviously many modifications and variations of the present invention arepossible in the light of the above teachings. It is therefore to beunderstood that within the scope of the appended claims the inventionmay be practiced otherwise than as specifically described.

What is claimed is:

1. An asymmetric wave generator comprising:

(a) a source of direct current power;

(b) a saturable transformer having a pair of primary windings and asecondary winding;

(c) a pair of transistors;

(d) means coupling the source to one primary winding through theemitter-collector circuit of one of the transistors;

(e) means coupling the source to the other primary winding through theemitter-collector circuit of the other transistor;

(f) a pair of oppositely phased alternating current sources;

(g) means coupling one alternating current source between the base andemitter of one transistor;

(h) means coupling the other alternating current source between the baseand emitter of the other transistor;

(i) a load;

(j) a first variable resistor;

(k) a first diode;

(1) means connecting the secondary winding, the load, the first variableresistor, and the first diode in series, the first diode being orientedso as to permit flow current through the secondary winding in onedirection;

(m) a second variable resistor;

(n) a second diode;

(o) and means connecting the secondary winding, the load, the secondvariable resistor, and the second diode in series, the second diodebeing oriented so as to permit flow of current through the secondarywinding in the opposite direction.

2. An asymmetric wave generator comprising:

(a) a source of direct current power;

(b) a first saturable transformer having a pair of primary windings anda secondary winding;

(c) a second saturable transformer having a pair of primary windings anda pair of oppositely wound secondary windings;

(d) a pair of transistors;

(e) a circuit connecting the source, the emitter-collector circuit ofone transistor, one of the primary windings of the first transformer andone of the primary windings of the second transformer in series;

(f) a circuit connecting the source, the emitter-collector circuit ofthe other transistor, the other primary Winding of the first transformerand the other primary winding of the second transformer in series;

(g) a pair of variable resistors;

(h) means coupling one of the secondary windings of the secondtransformer in series with one variable resistor between the emitter andbase of one transistor;

(i) means coupling the other secondary winding of the second transformerin series with the other variable resistor between the emitter and baseof the other transistor;

(3') a load;

(k) a third variable resistor;

(l) a first diode;

(m) means connecting the secondary winding of the first transformer, theload, the third variable resistor, and the first diode in series, thefirst diode being oriented so to permit flow of current through thesecondary winding of the first transformer in one direction;

(11) a fourth variable resistor;

(o) a second diode;

(p) and means connecting the secondary winding of the first transformer,theh load, the fourth variable resistor, and the second diode in series,the second diode being oriented so as to permit flow of current throughthe secondary winding of the first transformer in opposite thedirection.

3. An asymmetric wave generator comprising:

(a) a source of direct current power;

(b) a first saturable transformer having a pair of primary windings anda secondary winding;

(c) a second saturable transformer having a pair of primary windings anda pair of oppositely wound secondary windings;

(d) a third saturable transformer having a pair of primary windings anda pair of secondary windings;

(e) a pair of transistors;

(f) a circuit connecting the source, the emitter-collector circuit ofone transistor, one of the primary windings of the first transformer,one of the primary windings of the second transformer and one of theprimary windings of the third transformer in series;

(g) a circuit connecting the source, the emitter-collector circuit ofthe other transistor, the other primary Winding of the firsttransformer, the other primary Winding of the second transformer and theother primary winding of the third transformer in series;

(h) a pair of variable resistors;

(i) means coupling one of the secondary windings of the secondtransformer in series with one variable resistor between the emitter andbase of one transistor;

(j) means coupling the other secondary winding of the second transformerin series with the other variable resistor between the emitter and baseof the other transistor;

(k) means coupling one secondary Winding of the third transformer inparallel with the one variable resistor;

(1) means coupling the other secondary winding of the third transformerin parallel with the other variable resistor, the secondary windings ofthe third transformer being oriented so as to develop potentials inopposition to the potentials developed by their associated secondarywindings of the second transformer;

(m) a load;

(n) a third variable resistor;

(o) a first diode;

(p) means connecting the secondary winding of the first transformer, theload, the third variable resistor, and the first diode in series, thefirst diode being oriented so as to permit flow of current through thesecondary winding of theh first transformer in one direction;

(q) a fourth variable resistor;

(r) a second diode;

(s) and means connecting the secondary winding of the first transformer,the load, the fourth variable resistor, and the second diode in series,the second diode being oriented so as to permit how of current throughthe secondary winding of the first transformer in the oppositedirection.

References Cited by the Examiner UNITED STATES PATENTS ROY LAKE, PrimaryExaminer.

JOHN KOMINSKI. Examiner.

1. AN ASYMMETRIC WAVE GENERATOR COMPRISING: (A) A SOURCE OF DIRECTCURRENT POWER; (B) A SATURABLE TRANSFORMER HAVING A PAIR OF PRIMARYWINDINGS AND A SECONDARY WINDING; (C) A PAIR OF TRANSISTORS; (D) MEANSCOUPLING THE SOURCE TO ONE PRIMARY WINDING THROUGH THE EMITTER-COLLECTORCIRCUIT OF ONE OF THE TRANSISTORS; (E) MEANS COUPLING THE SOURCE TO THEOTHER PRIMARY WINDING THROUGH THE EMITTER-COLLECTOR CIRCUIT OF THE OTHERTRANSISTOR; (F) A PAIR OF OPPOSITELY PHASED ALTERNATING CURRENT SOURCES;(G) MEANS COUPLING ONE ALTERNATING CURRENT SOURCE BETWEEN THE BASE ANDEMITTER OF ONE TRANSISTOR; (H) MEANS COUPLING THE OTHER ALTERNATINGCURRENT SOURCE BETWEEN THE BASE AND EMITTER OF THE OTHER TRANSISTOR; (I)A LOAD; (J) A FIRST VARIABLE RESISTOR; (K) A FIRST DIODE; (L) MEANSCONNECTING THE SECONDARY WINDING, THE LOAD, THE FIRST VARIABLE RESISTOR,AND THE FIRST DIODE IN SERIES, THE FIRST DIODE BEING ORIENTED SO AS TOPERMIT FLOW CURRENT THROUGH THE SECONDARY WINDING IN ONE DIRECTION; (M)A SECOND VARIABLE RESISTOR; (N) A SECOND DIODE; (O) AND MEANS CONNECTINGTHE SECONDARY WINDING, THE LOAD, THE SECOND VARIABLE RESISTOR, AND THESECOND DIODE IN SERIES, THE SECOND DIODE BEING ORIENTED SO AS TO PERMITFLOW OF CURRENT THROUGH THE SECONDARY WINDING IN THE OPPOSITE DIRECTION.